Open SoC Debug is a new project co-managed by
and lowRISC projects with
the mission to establish a repository of common SoC debug
components. While our original focus is on hardware building
blocks and their interface on the debug host, we highly welcome
debug software developers to broaden the scope of Open SoC
(2018-05-14) Run-Control Debug ahead!
Stop the engines!
This command will be understood by Open SoC Debug soon as Shivam Aggarwal (@shivmgg) adds run-control debug support to Open SoC Debug.
Run-control debug, or “stop and stare debugging” is known to many when using a debugger such as GDB to set breakpoints and inspect the program state once the executed halted.
Up to now, Open SoC Debug focused on tracing, leaving this other important debugging technique on the wishlist.
But not any longer.
(2017-09-21) Major changes in Open SoC Debug ahead!
Over the last roughly two years, Open SoC Debug has grown into a reliable debugging tool for the needs of lowRISC and OpTiMSoC.
A lot of effort went into fixing small bugs to improve reliability and to add some features such as the emulated UART device, UART-DEM.
And it was worth the effort, as we’ve seen over the summer when we added Linux support to OpTiMSoC.
Control flow traces generated by the CTM modules, as well as the UART-DEM module were major enablers for this work.
(2017-03-21) Documentation updated
We have updated our specification and other documentation significantly!